課程名稱 |
電子設計自動化導論 Introduction to Electronic Design Automation |
開課學期 |
104-2 |
授課對象 |
電機資訊學院 電機工程學系 |
授課教師 |
江介宏 |
課號 |
EE3012 |
課程識別碼 |
901 33700 |
班次 |
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學分 |
3 |
全/半年 |
半年 |
必/選修 |
選修 |
上課時間 |
星期一2,3,4(9:10~12:10) |
上課地點 |
電二225 |
備註 |
總人數上限:50人 |
Ceiba 課程網頁 |
http://ceiba.ntu.edu.tw/1042EE3012_EDA |
課程簡介影片 |
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核心能力關聯 |
核心能力與課程規劃關聯圖 |
課程大綱
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課程概述 |
1. Introduction
History, VLSI design flow, etc.
2. Basics of Computation Theory and Mathematical Optimization
3. Models of computation
Finite state machines, automata, Kahn process network, Petri-nets, etc.
4. High-level synthesis
Design space exploration, resource sharing, etc.
5. Logic synthesis
Technology independent optimization, technology mapping, technology dependent optimization, timing and power analysis, etc.
6. Verification
Combinational and sequential equivalence checking, property checking, etc.
7. Physical design
Floorplanning, placement, routing, etc.
8. Testing
Combinational and sequential ATPG, design for test, etc.
9. Simulation
Numerical techniques, device modeling, switch-level and logic-level simulation, etc.
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課程目標 |
Electronic Design Automation (EDA) concerns the correctness, reliability, productivity, and optimization of system construction. It is an interdisciplinary field, where electrical engineering and computer sciences intersect. In EDA, theoretical computer science (including algorithms, complexity, automata, logic, programming languages, etc.) finds rich and practical applications. On the other hand, some of the techniques developed in the EDA community have been much enhanced the state-of-the-art solvers on intractable problems. In this course we will study some representative problems and solutions making VLSI design an automatic process. In particular, we will cover system modeling, optimization, analysis, and verification.
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課程要求 |
Prerequitite:
Switching circuits and logic design
Grading:
Homework 20%
Midterm Exam 30%
Fianl Exam 30%
Project 20% |
預期每週課後學習時數 |
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Office Hours |
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指定閱讀 |
待補 |
參考書目 |
Textbook: Electronic Deisng Automation: Synthesis, Verification, and Test, Laung-Terng Wang, Kwang-Ting (Tim) Cheng, and Yao-Wen Chang, editors, Morgan Kaufmann Publishers, 2009.
Reference: Course handouts.
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評量方式 (僅供參考) |
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週次 |
日期 |
單元主題 |
第1週 |
2/22 |
Introduction |
第2週 |
2/29 |
-- (Holiday) |
第3週 |
3/07 |
Computation and Optimization |
第4週 |
3/14 |
Models of Computation |
第5週 |
3/21 |
High-Level Synthesis |
第6週 |
3/28 |
Logic Synthesis (I) |
第7週 |
4/04 |
-- (Holiday) |
第8週 |
4/11 |
Logic Synthesis (II) |
第9週 |
4/18 |
Logic synthesis (II) |
第10週 |
4/25 |
Verification (I) |
第11週 |
5/02 |
Midterm |
第12週 |
5/09 |
Verification (II) |
第13週 |
5/16 |
Physical Design (I) |
第14週 |
5/23 |
Physical Design (II) |
第15週 |
5/30 |
Physical Design (III) |
第16週 |
6/06 |
ABC Tutotial |
第17週 |
6/13 |
Testing |
第18週 |
6/20 |
Final Quiz and Project Presentation |
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